In many integrated memory arrays, several redundant rows are provided to be used as substitutes for defective rows in the memory. When a defective row is identified, rather than treating the entire chip as defective, a redundant row can be utilized in place of the defective row. The substitution of the redundant row for the defective row is performed by assigning the address of the defective row to the redundant row, such that when an address select signal corresponding to the defective row is received, the redundant row is addressed instead.
To make the substitution of the redundant row for the defective row substantially transparent to a system employing the memory, the memory includes a redundant row detection circuit. The redundant row detection circuit monitors the row addresses and, when the address of the defective row is received, enables the redundant row instead.
One known approach to redundant row detection circuits employs a NOR-style fuse bank. In such circuits, fuses corresponding to address bits are "blown" to produce open circuits on sense lines. The fuses are typically blown by laser-cutting the fuse conductor to eliminate the conductive path through the fuse. In operation, the sense lines are charged and voltage drops across the sense lines in response to a row address select signal are monitored. If the voltage drops across the sense lines correspond to the address of a defective row, the redundant row circuit produces a signal indicating that a redundant row is to be substituted.
Often, the blown fuses are not fully "blown." That is, a slightly conductive path remains through the fuse that allows current to bleed through the fuse. Often, this is a result of the laser-cutting procedure failing to cut all the way through the fuse. As a result of current bleeding through the resistor, the voltage across the fuse may be difficult to maintain, especially when an addressed row remains active for an extended period of time.
If the voltage across the fuses drops below a selected reference voltage, the redundant row circuit determines incorrectly that the blown fuses do not correspond to the address of the defective row. Consequently, the redundant row is not substituted for the defective row and the system may try to store or retrieve data from the defective row.